考纲要求

15.1 RISC, CISC and Parallel Processing

Candidates should be able to:

• 15.1.1 Show understanding of the characteristics of RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer) processors
• 15.1.2 Show understanding of the differences between RISC and CISC, including:
  • instruction set size and complexity
  • number of addressing modes
  • clock cycle per instruction (CPI)
  • use of pipelining
  • compiler complexity
  • code density
• 15.1.3 Show understanding of pipelining, including:
  • stages: IF (Instruction Fetch), ID (Instruction Decode), OF (Operand Fetch), IE (Instruction Execute), WB (Write Back)
  • timing diagrams
  • hazards (structural, data, control)
• 15.1.4 Show understanding of parallel processing, including:
  • Flynn's classification: SISD, SIMD, MISD, MIMD
  • massively parallel computers
• 15.1.5 Show understanding of virtual machines:
  • purpose of a virtual machine
  • benefits and limitations
  • host operating system and guest operating system
  • hypervisor / virtual machine monitor (VMM)